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高性能算子/通信/编译器工程师

Location
Beijing · Hangzhou
Employment type
Full-time · Intern
AI Infra

Responsibilities

1.针对 GPU/NPU 等架构,使用 CUDA、Ascend C 和 TileLang,设计、实现并长期维护 GEMM、Attention 以及其他算子。 2.针对不同通信场景和网络架构,设计、实现并长期维护通信算子(如 DeepEP 中的 EP、CP/DP、Engram、PP),同时持续对 NCCL/HCCL 等主流集合通信库进行调优和排障。 3.参与面向深度学习的 DSL 编译器(如 TileLang 等)的研发,负责设计面向新一代硬件的编译优化,并围绕内部实际的新模型、新算子和性能优化的需求扩展 DSL/IR/CodeGen 的能力,并在保持接口的简洁和可维护性的同时尽可能提升性能。 4.紧贴模型结构和算法演进,和框架同学、研究员共同为新思路设计硬件友好的模型结构和算法,并对真实训练/推理负载持续进行性能分析。

Requirements

1.基础扎实,学习能力强,愿意深入复杂系统和底层细节。 2.代码能力强,代码品味好,擅长与 Code Agent 合作。 3.对大模型训练、推理、RL、多模态系统优化有强烈兴趣。 4.熟悉 Python / C++ / Rust 之一,了解 PyTorch。

Who this role is for

本硕博

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